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Minimum XOR circuit for an eight-tap cyclic transform

TheoremDB P3720 · algorithms

Inferred from the community field; finer classification has not been reviewed.

Source catalogue assessmentAs of 2026-09-08Source & evidence ↓

Problem statement

Over F2\mathbb F_2, map sixteen input bits to yi=xi+xi+1+xi+3+xi+4+xi+7+xi+8+xi+10+xi+11y_i=x_i+x_{i+1}+x_{i+3}+x_{i+4}+x_{i+7}+x_{i+8}+x_{i+10}+x_{i+11}, with indices modulo 16. Determine the minimum number of fanout-free-cost, two-input XOR gates in a straight-line circuit computing all sixteen outputs.

Lean 4

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Progress & source assessment

Source-reported assessment, retrieved 8 September 2026. Frontier Science has not independently reviewed this status.

Open. No signed Lean verification is attached to this problem or its selected resolution.

References
  1. [1]TheoremDB P3720 link

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